![]() So for a few days now, I've been having a problem where at random intervals, I will lose ethernet connectivity for a few seconds, and then the machine seems to sort itself out. I'm currently experiencing an issue on my PC that has an Asus ROG Maximus XI Hero Wifi at it's core. is really boring.TPU Community, I need your help. So the ONLY way I find is to boot and re-boot EVERY TIME at -69☌, not -68 neither -70 but -69. If I try to boot OR re-boot from -70 to -170 I have "d6" code and no display If I boot between 20 and -68 I have a CB at -69☌ and MB shut down I also did a 7h long stream for XOC, video should be export soon.īTW, I have really strange behaviour with my 3600x and IMPACT (0050), : Tight SUB et TER as much as possible, I ran out of time so there is probably headroom to improve it. This is 1 CCD CPU, with 2CDD you will have better result. You can try Cas14 or more MHz also but was not booting for me. For "other" you can still look at this it but without audio □.Cold CPU improves Memory OC so you don’t need to worry about MC cold bug.įor french guy you have all setting in this video * here * : Therefore test your Memory settings on ambient first. When cold, FCLK needs to be 1400+ and VDDG 1.15v if not Fabric will be unstable so you need to torch up to maybe -60c in this case. IF you clear cmos, FCLK will go back to Auto and CLDO VDDG voltage will too. AMD’s recovery mode restores every AMD option back to stock, including timings and CLDO voltages.īecause of the above, try not to clear cmos during LN2, at most go safe mode if your settings can be sustained with 1.5v DRAM, since BIOS will apply 1.5v for safemode when LN2 enable. Either you have to clear cmos or wait for 5 times of post code ‘F9’ to get into AMD’s recovery mode. Safemode cannot restore back to stock memory settings as this takes place in the ‘PSP’ which the BIOS has no control over at that point of time. Other code : (can press reset 2~3 try but If not solved You need to lower the temperature to 100c ~ 120c.) You need 1400 FCLK + 1.15v VDDG and 1.35~1.45VSOC.Ġ7 : too high fabric / fabric unstable (can press reset 2~3 try but If not solved You need to reset the flck clock after lowering the temperature to -120c.)į9 or 23 : High Memory Clock / Tight Timings (Memory reset need) You will need to do this before -40C to avoid cold bug. Higher usually fails during LN2.Įnable LN2 mode, Use the Load LN2 profile as a base template, this uses low vcore so you can save exit when it’s not cold. VDDG only takes effect at 1400+ FCLK so under LN2 you need to set 1400. Since VDDG is sourced from SOC so SOC should be higher. Improve FCLK Margin by using 1.15VDDG (too much will hang) and 1.3+v SOC. Improves performance but limited, ~ 1800+ on air and 1400 on LN2.įCLK instability includes hang at postcodes such as ‘07’, stuttering in OS, drop performance in Cinebench. Also sometimes there is temperature hole so going lower than it hangs may help.ġ200 default freq and supposed to go 1:1 with memory for best latency. I typically use 1.35v ~ 1.55v SOC just to get as high an FCLK/Cold bug margin as possible.ĭo not be alarmed when it resets when temperature changes, pcie and fclk needs to retrain when temps change. VDDG 1.15v, SOC 1.28v, disable DF Cstates.ĭepending on the CPU and FCLK, may have to control temps -120C ~ -170C. There is an FCLK cold bug under LN2 so try to stay around 1400~1600 for FCLK under LN2 to get a good compromise between temps and perf. LN2 jumper enabled, FCLK = 1566, VDDG CCD = 1.2V, VDDG IOD = 0.9V. TRFC / tRFC2 / tRFC4 now max value can do 1023. ROG CROSSHAIR VIII EXTREME BETA BIOS 0601įOR XOC 3001 BIOS (Some CPUs have better XOC in old bios, so need to test it) ROG CROSSHAIR VIII DARK HERO BETA BIOS 4001 ROG CROSSHAIR VIII FORMULA BETA BIOS 4001 ROG CROSSHAIR VIII HERO WIFI BETA BIOS 4001 So please rollback to the previous version if you have any problems ![]() New AGESA version has been applied, but there may be bugs.
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